The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2024
Filed:
Aug. 30, 2021
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Pei-Sheng Tang, Taipei, TW;
Wei-De Ho, Hsinchu, TW;
Han-Wei Wu, Tainan, TW;
Yuan-Hsiang Lung, Hsinchu, TW;
Hua-Tai Lin, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method for manufacturing a memory device includes forming a dielectric layer over a wafer, wherein the wafer has a device region and a peripheral region adjacent to the device region. A bottom via opening is formed in the dielectric layer and over the device region of the wafer and a trench is formed in the dielectric layer and over the peripheral region of the wafer. A bottom electrode via is formed in the bottom via opening. A bottom electrode layer is conformally formed over the bottom electrode via and lining a sidewall and a bottom of the trench. A memory layer and a top electrode are formed over the bottom electrode layer.