The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2024

Filed:

Nov. 27, 2023
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Shunpei Yamazaki, Setagaya, JP;

Kiyoshi Kato, Atsugi, JP;

Tomoaki Atsumi, Hadano, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/786 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 29/7869 (2013.01); H10B 12/20 (2023.02);
Abstract

A novel semiconductor device formed with single-polarity circuits using OS transistors is provided. Thus, connection between different layers in a memory circuit is unnecessary. This can reduce the number of connection portions and improve the flexibility of circuit layout and the reliability of the OS transistors. In particular, many memory cells are provided; thus, the memory cells are formed with single-polarity circuits, whereby the number of connection portions can be significantly reduced. Further, by providing a driver circuit in the same layer as the cell array, many wirings for connecting the driver circuit and the cell array can be prevented from being provided between layers, and the number of connection portions can be further reduced. An interposer provided with a plurality of integrated circuits can function as one electronic component.


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