The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2024
Filed:
Feb. 02, 2017
Stmicroelectronics S.r.l., Agrate Brianza, IT;
Stmicroelectronics International N.v., Amsterdam, NL;
Giuseppe Desoli, San Fermo Della Battaglia, IT;
Thomas Boesch, Rovio, CH;
Nitin Chawla, Noida, IN;
Surinder Pal Singh, Noida, IN;
Elio Guidetti, Montano Lucino, IT;
Fabio Giuseppe De Ambroggi, Biassono, IT;
Tommaso Majo, Vittuone Mi, IT;
Paolo Sergio Zambotti, Milan, IT;
STMICROELECTRONICS S.r.l., Agrate Brianza, IT;
STMICROELECTRONICS INTERNATIONAL B.V., Amsterdam, NL;
Abstract
Embodiments are directed towards a system on chip (SoC) that implements a deep convolutional network heterogeneous architecture. The SoC includes a system bus, a plurality of addressable memory arrays coupled to the system bus, at least one applications processor core coupled to the system bus, and a configurable accelerator framework coupled to the system bus. The configurable accelerator framework is an image and deep convolutional neural network (DCNN) co-processing system. The SoC also includes a plurality of digital signal processors (DSPs) coupled to the system bus, wherein the plurality of DSPs coordinate functionality with the configurable accelerator framework to execute the DCNN.