logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12108682 B1

PDFFull Text
Date of Patent:
Oct. 01, 2024

Filed:

Jul. 27, 2021

Semiconductor structure, memory cell and memory array

Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Baolei Wu, Hefei, CN;

Xiaoguang Wang, Hefei, CN;

Yulei Wu, Hefei, CN;

Assignee:

CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;

Attorney:

Kilpatrick Townsend & Stockton LLP

Primary Examiner:

Ali Naraghi

Assistant Examiner:

E Rhett Cheek

Int. Cl.
CPC ...
H10N 50/10 (2023.01); G11C 7/18 (2006.01); G11C 8/14 (2006.01); H01L 23/528 (2006.01); H10B 61/00 (2023.01); H10N 50/80 (2023.01);
U.S. Cl.
CPC ...
H10N 50/10 (2023.02); G11C 7/18 (2013.01); G11C 8/14 (2013.01); H01L 23/5283 (2013.01); H10B 61/22 (2023.02); H10N 50/80 (2023.02);
Abstract

Provided is a semiconductor structure, a memory cell and a memory array. An nT-MRAM can be realized by a relatively simple structure. Transistors connected to multiple MTJs are connected by connecting pads.

Find Patent Forward Citations

Wu, Baolei. (2024). Semiconductor structure, memory cell and memory array (U.S. Patent No. 12108682). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12108682

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…