The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2024
Filed:
Jun. 15, 2023
Applicant:
Astera Labs, Inc., Santa Clara, CA (US);
Inventors:
Enrique Musoll, San Jose, CA (US);
Anh T. Tran, Elk Grove, CA (US);
Subbarao Arumilli, Cupertino, CA (US);
Chi Feng, San Jose, CA (US);
Assignee:
Astera Labs, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/15 (2006.01); G11C 29/36 (2006.01); G11C 29/42 (2006.01); H03M 13/09 (2006.01);
U.S. Cl.
CPC ...
H03M 13/1575 (2013.01); G11C 29/36 (2013.01); G11C 29/42 (2013.01); H03M 13/095 (2013.01); H03M 13/1515 (2013.01); G11C 2029/3602 (2013.01);
Abstract
A memory control component encodes over-capacity data into an error correction code generated for and stored in association with an application data block, inferentially recovering the over-capacity data during application data block read-back by comparing error syndromes generated in detection/correction operations for respective combinations of each possible value of the over-capacity data and the read-back application data block.