The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2024

Filed:

Aug. 09, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Bo-Jiun Lin, Jhubei, TW;

Yu Chao Lin, Hsinchu, TW;

Tung Ying Lee, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76843 (2013.01); H01L 21/76802 (2013.01); H01L 21/7684 (2013.01); H01L 21/76874 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 29/66795 (2013.01);
Abstract

An embodiment is a method including forming an opening in a mask layer, the opening exposing a conductive feature below the mask layer, forming a conductive material in the opening using an electroless deposition process, the conductive material forming a conductive via, removing the mask layer, forming a conformal barrier layer on a top surface and sidewalls of the conductive via, forming a dielectric layer over the conformal barrier layer and the conductive via, removing the conformal barrier layer from the top surface of the conductive via, and forming a conductive line over and electrically coupled to the conductive via.


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