The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2024

Filed:

Mar. 01, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Nicola Del Gatto, Cassina de' Pecchi, IT;

Emanuele Confalonieri, Segrate, IT;

Paolo Amato, Treviglio, IT;

Patrick Estep, Rowlett, TX (US);

Stephen S. Pawlowski, Beaverton, OR (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/0864 (2016.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0619 (2013.01); G06F 3/0622 (2013.01); G06F 3/0656 (2013.01); G06F 3/0689 (2013.01); G06F 12/0864 (2013.01);
Abstract

A memory controller can include a front end portion configured to interface with a host, a central controller portion configured to manage data, a back end portion configured to interface with memory devices. The memory controller can include interface management circuitry coupled to a cache and a memory device. The memory controller can receive, by the interface management controller, a first signal indicative of data associated with a memory access request from a host. The memory controller can transmit a second signal indicative of the data to cache the data in a first location in the cache. The memory controller can transmit a third signal indicative of the data to cache the data in a second location in the cache.


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