The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2024

Filed:

Nov. 09, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Yanghao Liu, Hefei, CN;

Jun Xia, Hefei, CN;

Kangshu Zhan, Hefei, CN;

Sen Li, Hefei, CN;

Qiang Wan, Hefei, CN;

Tao Liu, Hefei, CN;

Penghui Xu, Hefei, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 28/92 (2013.01); H01L 28/91 (2013.01); H10B 12/03 (2023.02); H10B 12/033 (2023.02);
Abstract

A method for forming a capacitor array structure includes the following operations. A base is formed, which includes a substrate, a stack structure located on the substrate and a mask layer located on the stack structure in which an etching window that penetrates the mask layer in a direction perpendicular to the substrate is provided. The stack structure is etched along the etching window to form a capacitor hole that penetrates the stack structure along the direction perpendicular to the substrate. A conductive layer that fills up the capacitor hole and the etching window and covers a top surface of the mask layer is formed. The conductive layer and the mask layer at a top surface of the stack structure are removed, and the conductive layer remaining in the capacitor hole forms a lower electrode.


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