The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2024
Filed:
Oct. 28, 2022
Kepler Computing Inc., San Francisco, CA (US);
Sasikanth Manipatruni, Portland, OR (US);
Niloy Mukherjee, San Ramon, CA (US);
Noriyuki Sato, Palo Alto, CA (US);
Tanay Gosavi, Portland, OR (US);
Mauricio Manfrini, Heverlee, BE;
Somilkumar J. Rathi, San Jose, CA (US);
James David Clarkson, El Sobrante, CA (US);
Rajeev Kumar Dokania, Beaverton, OR (US);
Debo Olaosebikan, San Francisco, CA (US);
Amrita Mathuriya, Portland, OR (US);
Kepler Computing Inc., San Francisco, CA (US);
Abstract
A method to deposit a multi-layer stack for device applications includes implementing a model driven target selection for deposition. One or more targets may be procured with an initial stoichiometric composition or elemental purity. The targets may be utilized to form the multi-layer stack, and measurements may be made of chemical composition and electrical properties of the multi-layer stack. The measurements may be compared to reference target values and if measurement results are not within tolerance, the composition of the targets can be changed to yield a successive multi-layer stack. The process can be iterated until measurement results are within tolerance of target results. Additional experimentation with post deposition thermal anneal can be performed to optimize multi-layer stack properties.