The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2024

Filed:

Aug. 15, 2022
Applicant:

Astera Labs, Inc., Santa Clara, CA (US);

Inventors:

Enrique Musoll, San Jose, CA (US);

Anh T. Tran, Elk Grove, CA (US);

Subbarao Arumilli, Cupertino, CA (US);

Chi Feng, San Jose, CA (US);

Assignee:

Astera Labs, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); H03M 13/15 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0608 (2013.01); G06F 3/0629 (2013.01); G06F 3/0673 (2013.01); H03M 13/1515 (2013.01);
Abstract

A decoding engine within an integrated-circuit (IC) component iteratively executes error detection/correction operations with respect to a sequence of input data volumes to generate a corresponding sequence of error syndrome values, the input data volumes each including a first block of data and corresponding error correction code retrieved from one or more external memory components together with a respective one of a plurality of q-bit data patterns. Selector circuitry within the decoding engine selects one of the plurality of q-bit data patterns to be an output q-bit value according to error-count differentiation indicated by the error syndrome values.


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