The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2024

Filed:

Feb. 22, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Wen-Ting Lan, Hsinchu, TW;

Guan-Lin Chen, Baoshan Township, Hsinchu County, TW;

Shi-Ning Ju, Hsinchu, TW;

Kuo-Cheng Chiang, Zhubei, TW;

Chih-Hao Wang, Baoshan Township, Hsinchu County, TW;

Ching-Wei Tsai, Hsinchu, TW;

Kuan-Lun Cheng, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0673 (2013.01); H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 27/0886 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 2029/7858 (2013.01);
Abstract

Semiconductor structures and method for manufacturing the same are provided. The semiconductor structure includes a substrate and a first fin structure formed over the substrate. The semiconductor structure also includes an isolation structure formed around the first fin structure and a protection layer formed on the isolation structure. The semiconductor structure also includes first nanostructures formed over the first fin structure and a gate structure surrounding the first nanostructures. In addition, a bottom surface of the gate structure and the top surface of the isolation structure are separated by the protection layer.


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