The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2024
Filed:
Nov. 21, 2022
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Lizabeth Keser, San Diego, CA (US);
Thomas Ort, Veitsbronn, DE;
Thomas Wagner, Regelsbach, DE;
Bernd Waidhas, Pettendorf, DE;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/66 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3192 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 21/78 (2013.01); H01L 22/14 (2013.01); H01L 23/3114 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 23/5389 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/96 (2013.01); H01L 23/3128 (2013.01); H01L 2224/18 (2013.01); H01L 2224/214 (2013.01); H01L 2224/95001 (2013.01);
Abstract
A semiconductor device and method is disclosed. Devices shown include a die coupled to an integrated routing layer, wherein the integrated routing layer includes a first width that is wider than the die. Devices shown further included a molded routing layer coupled to the integrated routing layer.