The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2024

Filed:

Feb. 13, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Te-Chih Hsiung, Taipei, TW;

Jyun-De Wu, New Taipei, TW;

Peng Wang, Hsinchu, TW;

Huan-Just Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 23/535 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76805 (2013.01); H01L 21/31116 (2013.01); H01L 21/76825 (2013.01); H01L 21/76828 (2013.01); H01L 21/76895 (2013.01); H01L 23/535 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/7851 (2013.01); H01L 29/78696 (2013.01);
Abstract

The present disclosure includes an ion implantation step that creates doped regions in gate dielectric caps. The doped regions have a different material composition and hence a different etch selectivity than un-doped regions in the gate dielectric caps. The doped regions thus allow for slowing down a subsequent etching process of forming gate contact openings.


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