The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2024
Filed:
May. 10, 2022
Changxin Memory Technologies, Inc., Hefei, CN;
Cheng-Jer Yang, Hefei, CN;
CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;
Abstract
Embodiments of the present application provide a readout circuit layout structure, a readout circuit, and a memory layout structure. The readout circuit layout structure includes: a readout amplification module, a first processing module, and a second processing module arranged along a preset direction, wherein the readout amplification module is configured to read a voltage of a bit line, and the first processing module and the second processing module are at least configured to perform a noise cancellation on an output signal of the readout amplification module. The readout amplification module includes: a first NMOS region and a first PMOS region arranged close to the first processing module, and a second NMOS region and a second PMOS region arranged close to the second processing module, the first NMOS region, the first PMOS region, the second PMOS region, and the second NMOS region being arranged along the preset direction.