The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2024

Filed:

Jul. 18, 2022
Applicant:

Shaoxing Yuanfang Semiconductor Co., Ltd., Shaoxing, CN;

Inventors:

Raja Prabhu J, Bangalore, IN;

Rakesh Kumar Gupta, Bangalore, IN;

Shuvadeep Mitra, Bangalore, IN;

Anurag Pulincherry, Bangalore, IN;

Ankit Seedher, Bangalore, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/24 (2006.01); G06F 13/40 (2006.01); H02J 1/10 (2006.01); H03L 7/085 (2006.01);
U.S. Cl.
CPC ...
G06F 1/263 (2013.01); G06F 1/24 (2013.01); G06F 13/4068 (2013.01); H02J 1/10 (2013.01); G06F 1/266 (2013.01); H03L 7/085 (2013.01);
Abstract

An integrated circuit (IC) includes input/output (I/O) ports, each operating using one of a pair of unequal power supplies during normal operation of the IC. A lower supply of the pair of unequal power supplies is required to be used as the power supply for the I/O port when a first input signal to the IC is received from an external source on a first I/O port of the I/O ports. The voltage range of the logic excursions of the first input signal is greater than the range from a magnitude of the lower supply to a constant reference potential. A regulation loop derives a derived lower supply having a magnitude equaling that of the lower supply from the higher supply of the pair of unequal power supplies, and applies the derived lower supply on a power supply node of the first I/O port.


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