The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2024

Filed:

Aug. 24, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Lingming Yang, Boise, ID (US);

Amitava Majumdar, Boise, ID (US);

Sandeep Krishna Thirumala, Boise, ID (US);

Nevil Gajera, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1076 (2013.01); G06F 3/0619 (2013.01); G06F 3/0659 (2013.01); G06F 3/0689 (2013.01); G06F 11/1096 (2013.01);
Abstract

Provided is a memory system comprising a plurality of memory channels each having a parity bit, a redundant array of independent devices (RAID) parity channel, and a controller of the memory system. The controller is configured to receive a block of data for storage in the memory channels and determine at least one of (i) when a data traffic demand on the memory channels is high and (ii) when a data traffic demand on the memory channels is low. Upon determining the data traffic demand is low, writing the block of data for storage in the memory channels and concurrently updating the parity bits and the RAID parity channel for the stored block of data. Upon determining the data traffic demand is high, only writing the data for storage in the memory channels.


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