The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2024
Filed:
May. 22, 2019
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Inventor:
Chang-Sheng Lin, Baoshan Township, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B24B 53/017 (2012.01); B24B 37/04 (2012.01); B24B 37/10 (2012.01); B24B 37/30 (2012.01); B24B 37/32 (2012.01); B24B 53/02 (2012.01); H01L 21/306 (2006.01); H01L 21/67 (2006.01); B24B 37/005 (2012.01);
U.S. Cl.
CPC ...
B24B 53/017 (2013.01); B24B 37/10 (2013.01); B24B 37/30 (2013.01); B24B 37/32 (2013.01); B24B 53/02 (2013.01); H01L 21/30625 (2013.01); H01L 21/67253 (2013.01); B24B 37/005 (2013.01); B24B 37/042 (2013.01);
Abstract
The present disclosure, in some embodiments, relates to a polishing system. The polishing system includes a carrier head configured to enclose a wafer. The carrier head has a retainer ring configured to laterally surround the wafer and an abrasive structure that partially covers a lower surface of the retainer ring. A membrane support is surrounded by the retainer ring and defines one or more ports. One or more chambers are coupled to the one or more ports and are defined by the membrane support and a flexible membrane having a lower surface configured to contact the wafer.