The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2024
Filed:
Nov. 14, 2019
South China University of Technology, Guangzhou, CN;
Guangdong Luckystar Electronic Technology Co., Ltd, Guangdong, CN;
Shenzhen Good-machine Automatic Equipment Co., Ltd, Guangdong, CN;
Zongtao Li, Guangzhou, CN;
Yong Tang, Guangzhou, CN;
Hong Wang, Guangzhou, CN;
Shudong Yu, Guangzhou, CN;
Kejian Wu, Guangzhou, CN;
Guanwei Liang, Guangzhou, CN;
Xinrui Ding, Guangzhou, CN;
SOUTH CHINA UNIVERSITY OF TECHNOLOGY, Guangzhou, CN;
GUANGDONG LUCKYSTAR ELECTRONIC TECHNOLOGY CO., LTD, Guangdong, CN;
SHENZHEN GOOD-MACHINE AUTOMATIC EQUIPMENT CO., LTD, Guangdong, CN;
Abstract
The present invention discloses a welding method of a demetallized ceramic substrate having a surface capillary microgroove structure. The demetallized ceramic substrate includes a ceramic substrate main body and surface capillary microstructures. The surface capillary microstructures are arranged on two lateral sides of the ceramic substrate main body and the surface capillary microstructures specifically are capillary microgrooves. The welding method includes the following steps: fixing a chip to an upper surface of the demetallized ceramic substrate having the surface capillary microgroove structure, fixing the ceramic substrate with the chip to a printed circuit board having a bonding pad, and placing melted solder on the bonding pad, and driving the solder to ascend to an electrode of the chip from the bonding pad in a lower layer by means of a capillary force, thereby realizing an electrical connection between the chip and the printed circuit board.