The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 2024
Filed:
Jun. 20, 2022
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventors:
Jing-Jung Huang, Hsinchu, TW;
Ching En Chen, Hsinchu, TW;
Jung-Hui Kao, Hsinchu, TW;
Kong-Beng Thei, Hsinchu Country, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/762 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/76224 (2013.01); H01L 21/823481 (2013.01); H01L 29/0653 (2013.01); H01L 29/42364 (2013.01); H01L 29/42376 (2013.01); H01L 29/66681 (2013.01); H01L 29/7816 (2013.01);
Abstract
A semiconductor structure includes a substrate including a first region and a second region; a first device disposed in the first region and a second device disposed in the second region; a first isolation disposed in the first region, wherein the first isolation is between a first source and a first drain, a first spacer overlaps the first isolation, the first isolation is separated from the first spacer by a first gate dielectric.