The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2024

Filed:

Aug. 27, 2020
Applicant:

Yangtze Memory Technologies Co., Ltd., Hubei, CN;

Inventors:

Xiang Hui Zhao, Hubei, CN;

Zui Xin Zeng, Hubei, CN;

Jun Hu, Hubei, CN;

Shi Zhang, Hubei, CN;

Baoyou Chen, Hubei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/50 (2023.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H10B 41/27 (2023.01); H10B 41/30 (2023.01); H10B 41/41 (2023.01); H10B 43/27 (2023.01); H10B 43/30 (2023.01); H10B 43/40 (2023.01); H10B 43/50 (2023.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H10B 43/40 (2023.02); H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H10B 41/27 (2023.02); H10B 41/30 (2023.02); H10B 41/41 (2023.02); H10B 41/50 (2023.02); H10B 43/27 (2023.02); H10B 43/30 (2023.02); H10B 43/50 (2023.02); H01L 23/53209 (2013.01); H01L 23/53214 (2013.01); H01L 23/53242 (2013.01); H01L 23/53257 (2013.01); H01L 23/53271 (2013.01); H01L 23/5329 (2013.01);
Abstract

A method for forming a staircase structure of 3D memory, including: forming an alternating layer stack on a substrate, forming a plurality of staircase regions where each staircase region has a staircase structure having a first number (M) of steps in a first direction; forming a first mask stack to expose a plurality of the staircase regions; removing (M) of the layer stacks in the exposed staircase regions; forming a second mask stack over the alternating layer stack to expose at least an edge of each of the staircase regions in a second direction; and repetitively, sequentially, removing a portion of (2M) of layer stacks and trimming the second mask stack.


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