The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2024

Filed:

Sep. 09, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Juntao Li, Cohoes, NY (US);

Shogo Mochizuki, Mechanicville, NY (US);

Choonghyun Lee, Chigasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7827 (2013.01); H01L 29/0847 (2013.01); H01L 29/401 (2013.01); H01L 29/41741 (2013.01); H01L 29/66666 (2013.01);
Abstract

VFET devices having symmetric, sharp channel-to-source/drain junctions and techniques for fabrication thereof using a late source/drain epitaxy process are provided. In one aspect, a VFET device includes: at least one vertical fin channel disposed on a substrate; a gate stack alongside the at least one vertical fin channel; a bottom source/drain region directly below the at least one vertical fin channel having, for example, an inverted T-shape with a flat bottom; and a top source/drain region over the at least one vertical fin channel. A method of fabricating a VFET device is also provided.


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