The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2024
Filed:
Jan. 30, 2023
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Inventors:
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 17/16 (2006.01); G06N 3/063 (2023.01); G11B 5/09 (2006.01); G11B 5/31 (2006.01); G11C 11/418 (2006.01); G11C 11/54 (2006.01); H01L 27/092 (2006.01); H10B 10/00 (2023.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 17/16 (2013.01); G06N 3/063 (2013.01); G11B 5/09 (2013.01); G11B 5/3146 (2013.01); G11C 11/418 (2013.01); G11C 11/54 (2013.01); H01L 27/0924 (2013.01); H10B 10/12 (2023.02); H10B 10/18 (2023.02);
Abstract
A method of designing a circuit is provided. The method includes: providing a circuit; selecting a first NMOS fin field-effect transistor (FinFET) in the circuit; and replacing the first NMOS FinFET having a first fin number with a second NMOS FinFET having a second fin number and a third NMOS FinFET having a third fin number, wherein the sum of the second fin number and the third fin number is equal to the first fin number.