The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2024

Filed:

Mar. 04, 2021
Applicant:

Asm Ip Holding B.v., Almere, NL;

Inventors:

Eiichiro Shiba, Hachioji, JP;

Yoshinori Ota, Tama, JP;

René Henricus Jozef Vervuurt, Tama, JP;

Nobuyoshi Kobayashi, Kawagoe, JP;

Akiko Kobayashi, Inagi, JP;

Assignee:

ASM IP Holding B.V., Almere, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31116 (2013.01); H01L 21/02164 (2013.01); H01L 21/0217 (2013.01);
Abstract

A method for fabricating a layer structure having a target topology profile in a step which has a side face and a lateral face, includes processes of: (a) depositing a dielectric layer on a preselected area of the substrate under first deposition conditions, wherein the dielectric layer has a portion whose resistance to fluorine and/or chlorine radicals under first dry-etching conditions is tuned; and (b) exposing the dielectric layer obtained in process (a) to the fluorine and/or chlorine radicals under the first dry-etching conditions, thereby removing at least a part of the portion of the dielectric layer, thereby forming a layer structure having the target topology profile on the substrate.


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