The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2024
Filed:
Mar. 14, 2020
Intel Corporation, Santa Clara, CA (US);
Joydeep Ray, Folsom, CA (US);
Niranjan Cooray, Folsom, CA (US);
Subramaniam Maiyuran, Gold River, CA (US);
Altug Koker, El Dorado Hills, CA (US);
Prasoonkumar Surti, Folsom, CA (US);
Varghese George, Folsom, CA (US);
Valentin Andrei, San Jose, CA (US);
Abhishek Appu, El Dorado Hills, CA (US);
Guadalupe Garcia, Chandler, AZ (US);
Pattabhiraman K, Bangalore, IN;
Sungye Kim, Folsom, CA (US);
Sanjay Kumar, Bangalore, IN;
Pratik Marolia, Hillsboro, OR (US);
Elmoustapha Ould-Ahmed-Vall, Chandler, AZ (US);
Vasanth Ranganathan, El Dorado Hills, CA (US);
William Sadler, Folsom, CA (US);
Lakshminarayanan Striramassarma, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments described herein provide techniques to enable the dynamic reconfiguration of memory on a general-purpose graphics processing unit. One embodiment described herein enables dynamic reconfiguration of cache memory bank assignments based on hardware statistics. One embodiment enables for virtual memory address translation using mixed four kilobyte and sixty-four kilobyte pages within the same page table hierarchy and under the same page directory. One embodiment provides for a graphics processor and associated heterogenous processing system having near and far regions of the same level of a cache hierarchy.