The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2024
Filed:
May. 13, 2022
Applicant:
Mediatek Inc., Hsin-Chu, TW;
Inventors:
Tzu-Hung Lin, Hsin-Chu, TW;
Yung-Chang Lien, Hsinchu, TW;
Assignee:
MediaTek Inc., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/16 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 23/16 (2013.01); H01L 23/3185 (2013.01); H01L 23/3675 (2013.01); H01L 23/5383 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 24/16 (2013.01); H01L 25/0655 (2013.01); H01L 2224/16235 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/19106 (2013.01); H01L 2924/3511 (2013.01); H01L 2924/3512 (2013.01);
Abstract
A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a frame, a redistribution layer, and a first semiconductor die. The substrate has a wiring structure and is surrounded by a molding material. The frame is disposed in the molding material and surrounds the substrate. The redistribution layer is disposed over the substrate and electrically coupled to the wiring structure. The first semiconductor die is disposed over the redistribution layer.