The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2024

Filed:

Oct. 08, 2019
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Chih-Tung Yeh, Taoyuan, TW;

Chun-Ming Chang, Kaohsiung, TW;

Bo-Rong Chen, Hsinchu County, TW;

Shin-Chuan Huang, Tainan, TW;

Wen-Jung Liao, Hsinchu, TW;

Chun-Liang Hou, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7786 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/4916 (2013.01); H01L 29/495 (2013.01); H01L 29/7787 (2013.01);
Abstract

An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.


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