The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2024

Filed:

Mar. 04, 2022
Applicant:

Yangtze Memory Technologies Co., Ltd., Hubei, CN;

Inventors:

Teng Chen, Hubei, CN;

Yan Wang, Hubei, CN;

Masao Kuriyama, Hubei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/12 (2006.01); G11C 7/18 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1048 (2013.01); G11C 7/1039 (2013.01); G11C 7/12 (2013.01); G11C 7/18 (2013.01);
Abstract

The present disclosure provides buffer circuits of 3D NAND memory device. In some embodiments, the buffer circuit comprises a first bit line segment sensing branch connected to a first bit line segment and including a low-voltage latch, and a second bit line segment sensing branch connected to a second bit line segment and including a sensing latch. The first bit line segment sensing branch and the second bit line segment sensing branch are parallel connected to a sensing node of the page buffer circuit.


Find Patent Forward Citations

Chen, Teng. (2024). Page buffer circuits of three-dimensional memory device (U.S. Patent No. 11935619). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11935619

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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