The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 2024
Filed:
Mar. 06, 2023
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Jianmin Huang, San Carlos, CA (US);
Xiangang Luo, Fremont, CA (US);
Kulachet Tanpairoj, San Mateo, CA (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 3/06 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 3/0619 (2013.01); G06F 3/064 (2013.01); G06F 3/0649 (2013.01); G06F 3/0679 (2013.01); G06F 11/076 (2013.01);
Abstract
An example apparatus includes a media management superblock component configured to determine that a quantity of blocks of a superblock of a non-volatile memory array are bad blocks; compare the quantity of bad blocks to a bad block criteria; and write host data to the superblock with the quantity of bad blocks in response to the quantity of bad blocks meeting the bad block criteria. The use of the superblock with a particular quantity of bad block minimizes yield loss for non-use of partial superblocks.