The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2024

Filed:

Nov. 28, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Su-Jen Sung, Zhubei, TW;

Chih-Chiang Chang, Zhubei, TW;

Chia-Ho Chen, Zhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/532 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53238 (2013.01); H01L 21/76832 (2013.01); H01L 21/76834 (2013.01); H01L 21/76849 (2013.01); H01L 21/76852 (2013.01); H01L 21/76885 (2013.01); H01L 23/5329 (2013.01); H01L 2924/0002 (2013.01);
Abstract

The present disclosure relates to an integrated circuit. The integrated circuit includes a conductive interconnect disposed on a dielectric over a substrate. An interfacial layer is arranged along an upper surface of the conductive interconnect. A liner is arranged along a lower surface of the conductive interconnect. The liner and the interfacial layer surround the conductive interconnect. A middle layer is located over the interfacial layer and has a bottommost surface over the dielectric. A bottommost surface of the interfacial layer and the bottommost surface of the middle layer are both above a top of the conductive interconnect.


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