The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2024

Filed:

May. 18, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Hubert C. George, Portland, OR (US);

James S. Clarke, Portland, OR (US);

Ravi Pillarisetty, Portland, OR (US);

Brennen Karl Mueller, Portland, OR (US);

Stephanie A. Bojarski, Beaverton, OR (US);

Eric M. Henry, Forest Grove, OR (US);

Roza Kotlyar, Portland, OR (US);

Thomas Francis Watson, Portland, OR (US);

Lester Lampert, Portland, OR (US);

Samuel Frederick Neyens, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 10/00 (2022.01); H01L 29/775 (2006.01); H01L 29/12 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
G06N 10/00 (2019.01); H01L 27/088 (2013.01); H01L 29/122 (2013.01); H01L 29/775 (2013.01);
Abstract

Quantum dot devices with three of more accumulation gates provided over a single row of a quantum dot formation region are disclosed. Each accumulation gate is electrically coupled to a respective doped region. In this manner, multiple single electron transistors (SETs) are provided along the row. Side and/or center screening gates may be used to apply microwave pulses for qubit control and to control electrostatics so that source and drain regions of the multiple SETs with quantum dots formed along the single row of a quantum dot formation region are sufficiently isolated from one another. Such quantum dot devices provide strong spatial localization of the quantum dots, good control over quantum dot interactions and manipulation, good scalability in the number of quantum dots included in the device, and/or design flexibility in making electrical connections to the quantum dot devices to integrate the quantum dot devices in larger computing devices.


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