The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Jul. 09, 2021
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Xi-Wei Lin, Fremont, CA (US);

Victor Moroz, Saratoga, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/822 (2006.01); H01L 27/06 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823814 (2013.01); H01L 21/8221 (2013.01); H01L 21/823807 (2013.01); H01L 21/823871 (2013.01); H01L 21/823885 (2013.01); H01L 27/0688 (2013.01); H01L 27/092 (2013.01);
Abstract

A method of forming an electrical connection between a buried power rail (BPR) of an unfinished complementary field effect transistor (CFET) and a source or drain epitaxial growth of a lower level of the CFET is provided. The method includes performing silicon epitaxial growth in a lower level of the CFET, adding a contact material to a portion of an exposed portion of the silicon epitaxial growth in the lower level, the exposed portion of the silicon epitaxial growth being located in a vertical slot of the unfinished CFET structure, adding a conductive material within a vertical channel, the conductive material being in contact with the added contact material and the BPR to form an electrical connection between the portion of the exposed portion of the silicon epitaxial growth and the BPR and etching back a portion of the added conductive material within the vertical channel.


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