The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Dec. 30, 2019
Applicant:

Ansys, Inc., Canonsburg, PA (US);

Inventors:

Akhilesh Kumar, Milpitas, CA (US);

Norman Chang, Fremont, CA (US);

Hsiming Pan, San Jose, CA (US);

Jimin Wen, Pleasanton, CA (US);

Deqi Zhu, San Jose, CA (US);

Wenbo Xia, Milpitas, CA (US);

Wen-Tze Chuang, Yilan County, TW;

En-Cih Yang, New Taipei, TW;

Karthik Srinivasan, Cupertino, CA (US);

Ying-Shiun Li, Pleasanton, CA (US);

Assignee:

ANSYS, INC., Canonsburg, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/20 (2020.01); G06N 3/08 (2023.01); G06F 30/392 (2020.01); G06N 3/044 (2023.01); G06F 119/08 (2020.01);
U.S. Cl.
CPC ...
G06F 30/20 (2020.01); G06F 30/392 (2020.01); G06N 3/044 (2023.01); G06N 3/08 (2013.01); G06F 2119/08 (2020.01);
Abstract

Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. The methods can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC); performing a thermal simulation for each respective template of the IC based on a sequence of power patterns of tiles of the respective template; and training a neural network with a plurality of training data collected via thermal simulations performed for the templates of the IC. These systems and methods can use a machine learning predictor, that has been trained to determine a transient temperature rise across an entire IC, and then append the determined transient temperature rise to a system level thermal profile of the IC.


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