The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Aug. 26, 2021
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Hailong Yu, Shanghai, CN;

Xuezhen Jing, Shanghai, CN;

Hao Zhang, Shanghai, CN;

Tiantian Zhang, Shanghai, CN;

Jinhui Meng, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/417 (2006.01); H01L 27/088 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/41725 (2013.01); H01L 21/76897 (2013.01); H01L 21/823418 (2013.01); H01L 21/823475 (2013.01); H01L 27/088 (2013.01); H01L 29/0649 (2013.01);
Abstract

A semiconductor structure and a fabrication method of the semiconductor structure are provided. The method includes providing a substrate, forming a first dielectric layer and a plurality of gate structures, forming source-drain doped regions, and forming a source-drain plug. The first dielectric layer covers surfaces of the gate structure, the source-drain doped region and the source-drain plug. The method also includes forming a first plug in the first dielectric layer, and forming a second dielectric layer on the first dielectric layer. The first plug is in contact with a top surface of one of the source-drain plug and the gate structure. The second dielectric layer covers the first plug. Further, the method includes forming a second plug material film in the first and second dielectric layers. The second plug material film is in contact with the top surface of one of the source-drain plug and the gate structure.


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