The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Apr. 19, 2021
Applicant:

Amkor Technology Singapore Holding Pte. Ltd., Valley Point, SG;

Inventors:

Kyoung Yeon Lee, Gyeonggi-do, KR;

Byong Jin Kim, Gyeonggi-do, KR;

Jae Min Bae, Seoul, KR;

Hyung Il Jeon, Gyeonggi-do, KR;

Gi Jeong Kim, Gyeonggi-do, KR;

Ji Young Chung, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 21/60 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49548 (2013.01); H01L 21/4828 (2013.01); H01L 21/565 (2013.01); H01L 23/3121 (2013.01); H01L 23/49861 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 2021/60007 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/45099 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/181 (2013.01);
Abstract

A semiconductor package structure includes a substrate comprising a land structure. The land structure includes a first land section having a first height in a cross-sectional view and a second land section having a second height in the cross-sectional view that is different than the first height. A mold encapsulant is disposed adjacent a lateral portion of the first land section and is disposed below a bottom portion of the second land section. A semiconductor die is attached to the substrate, and includes a first major surface, a second major surface opposing the first major surface, and an outer perimeter. The semiconductor die further includes a bonding structure disposed adjacent the first major surface, which is coupled to the second land section such that the first land section is disposed outside the perimeter of the semiconductor die A mold member encapsulates at least portions of the semiconductor die.


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