The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2024
Filed:
Aug. 09, 2022
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Cheok-Kei Lei, Andar AC, MO;
Yu-Chi Li, Hsinchu, TW;
Chia-Wei Tseng, Hsinchu, TW;
Zhe-Wei Jiang, Hsinchu, TW;
Chi-Lin Liu, New Taipei, TW;
Jerry Chang-Jui Kao, Taipei, TW;
Jung-Chan Yang, Taoyuan County, TW;
Chi-Yu Lu, New Taipei, TW;
Hui-Zhong Zhuang, Kaohsiung, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Abstract
A layout method includes disposing a first conductive path and a second conductive path across a boundary between a first layout device and a second layout device abutting the first layout device. The layout method also includes disposing a first cut layer on the first conductive path nearby the boundary, and disposing a second cut layer on the second conductive path nearby the boundary. The layout method also includes moving the first cut layer to align with the second cut layer.