The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Jan. 14, 2022
Applicant:

Kepler Computing Inc., San Francisco, CA (US);

Inventors:

Amrita Mathuriya, Portland, OR (US);

Nabil Imam, Atlanta, GA (US);

Ikenna Odinaka, Durham, NC (US);

Rafael Rios, Austin, TX (US);

Rajeev Kumar Dokania, Beaverton, OR (US);

Sasikanth Manipatruni, Portland, OR (US);

Assignee:

KEPLER COMPUTING INC., San Francisco, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H03K 19/23 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0008 (2013.01); H03K 19/0021 (2013.01); H03K 19/23 (2013.01);
Abstract

Asynchronous circuit elements are described. Asynchronous circuit elements include a consensus element (c-element), completion tree, and validity tree. The c-element is implemented using adjustable threshold based multi-input capacitive circuitries. The completion tree comprises a plurality of c-elements organized in a tree formation. The validity tree comprises OR gates followed by c-elements. The multi-input capacitive circuitries include capacitive structures that may comprise linear dielectric, paraelectric dielectric, or ferroelectric dielectric. The capacitors can be planar or non-planar. The capacitors may be stacked vertically to reduce footprint of the various asynchronous circuitries.


Find Patent Forward Citations

Loading…