The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2024

Filed:

Jul. 26, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Kuo-Cheng Ching, Hsinchu County, TW;

Ying-Keung Leung, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 21/84 (2006.01); H01L 21/02 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823807 (2013.01); H01L 21/02123 (2013.01); H01L 21/02236 (2013.01); H01L 21/02255 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 21/845 (2013.01); H01L 27/092 (2013.01); H01L 27/1207 (2013.01); H01L 27/1211 (2013.01); H01L 29/66545 (2013.01);
Abstract

The present disclosure provides a method, which includes forming a first fin structure and a second fin structure over a substrate, which has a first trench positioned between the first and second fin structures. The method also includes forming a first dielectric layer within the first trench, recessing the first dielectric layer to expose a portion of the first fin structure, forming a first capping layer over the exposed portion of the first fin structure and the recessed first dielectric layer in the first trench, forming a second dielectric layer over the first capping layer in the first trench while the first capping layer covers the exposed portion of the first fin feature and removing the first capping layer from the first fin structure.


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