The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2024

Filed:

Jul. 01, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Amit Sureshkumar Nangia, Murphy, TX (US);

Sreenivasan Kalyani Koduri, Dallas, TX (US);

Siva Prakash Gurrum, Allen, TX (US);

Christopher Daniel Manack, Flower Mound, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/16 (2006.01);
U.S. Cl.
CPC ...
H01L 23/16 (2013.01); H01L 24/97 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/14 (2013.01);
Abstract

An integrated circuit (IC) includes a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer. A metal wall that is ring-shaped is positioned above the top metal layer that is not electrically coupled to the circuitry. The stress sensitive circuit portion is with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity.


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