The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2024
Filed:
Oct. 01, 2021
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Thorsten Scharf, Lappersdorf, DE;
Alexander Heinrich, Bad Abbach, DE;
Steffen Jordan, Pielenhofen, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/80 (2013.01); H01L 21/565 (2013.01); H01L 23/4985 (2013.01); H01L 2224/80357 (2013.01); H01L 2224/83385 (2013.01); H01L 2924/1511 (2013.01); H01L 2924/15724 (2013.01); H01L 2924/15738 (2013.01);
Abstract
A method of forming a chip package is provided. The method includes providing a malleable carrier with a layer of an electrically conductive material formed thereon, and positive fitting the malleable carrier to a chip to at least partially enclose the chip with the malleable carrier. The layer at least partially physically contacts the chip, such that the layer electrically contacts a chip contact of the chip. The layer forms a redistribution layer.