The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2023
Filed:
Jun. 23, 2022
Applicant:
Applied Materials, Inc., Santa Clara, CA (US);
Inventors:
Peng Suo, Singapore, SG;
Ying W. Wang, Singapore, SG;
Guan Huei See, Singapore, SG;
Chang Bum Yong, Singapore, SG;
Arvind Sundarrajan, Singapore, SG;
Assignee:
Applied Materials, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/308 (2006.01); H01L 21/288 (2006.01); H01L 21/285 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76898 (2013.01); H01L 21/288 (2013.01); H01L 21/2855 (2013.01); H01L 21/308 (2013.01); H01L 21/30625 (2013.01);
Abstract
The present disclosure relates to through-via structures with dielectric shielding of interconnections for advanced wafer level semiconductor packaging. The methods described herein enable the formation of high thickness dielectric shielding layers within low aspect ratio through-via structures, thus facilitating thin and small-form-factor package structures having high I/O density with improved bandwidth and power.