The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 19, 2023
Filed:
Jun. 30, 2022
Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;
Chen-Hao Huang, Taoyuan, TW;
Hau-Yan Lu, Hsinchu, TW;
Sui-Ying Hsu, New Taipei, TW;
YuehYing Lee, Hsinchu, TW;
Chien-Ying Wu, Hsinchu, TW;
Chia-Ping Lai, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;
Abstract
At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.