The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2023
Filed:
Aug. 17, 2020
Applicant:
Synopsys, Inc., Mountain View, CA (US);
Inventors:
Victor Moroz, Saratoga, CA (US);
Deepak Sherlekar, Cupertino, CA (US);
Jamil Kawa, Campbell, CA (US);
Assignee:
Synopsys, Inc., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/412 (2006.01); G06F 30/32 (2020.01); H10B 10/00 (2023.01);
U.S. Cl.
CPC ...
G11C 11/412 (2013.01); G06F 30/32 (2020.01); H10B 10/12 (2023.02);
Abstract
The independent claims of the present disclosure signify a concise description of embodiments. An electronic structure based on complementary-field effect transistor (CFET) architecture is disclosed. The electronic structure comprises an n-channel metal-oxide-semiconductior (NMOS) gate-all-around (GAA) channel in a first layer, and p-channel metal-oxide-semiconductor (PMOS) GAA channel in a second layer. The PMOS GAA channel is wider compared to the NMOS GAA channel. The first layer is above the second layer and separated by a dielectric layer.