The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Dec. 03, 2021
Applicant:

Tokyo Electron Limited, Tokyo, JP;

Inventors:

Lars Liebmann, Mechanicsville, NY (US);

Jeffrey Smith, Clifton Park, NY (US);

Daniel Chanemougame, Niskayuna, NY (US);

Paul Gutwin, Williston, VT (US);

Brian Cline, Austin, TX (US);

Xiaoqing Xu, Austin, TX (US);

David Pietromonaco, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 23/5286 (2013.01); H01L 25/18 (2013.01); H01L 2225/06544 (2013.01);
Abstract

Aspects of the present disclosure provide a multi-tier semiconductor structure. For example, the multi-tier semiconductor structure can include a first power delivery network (PDN) structure, and a first semiconductor device tier disposed over and electrically connected to the first PDN structure. The multi-tier semiconductor structure can further include a signal wiring tier disposed over and electrically connected to the first semiconductor device tier, a second semiconductor device tier disposed over and electrically connected to the signal wiring tier, and a second PDN structure disposed over and electrically connected to the second semiconductor device tier. The multi-tier semiconductor structure can further include a through-silicon via (TSV) structure electrically connected to the signal wiring tier, wherein the TSV structure penetrates the second PDN structure.


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