The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2023

Filed:

Aug. 09, 2022
Applicants:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

National Taiwan University, Taipei, TW;

Inventors:

Hung-Hsiang Cheng, New Taipei, TW;

Samuel C. Pan, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/47 (2006.01); H01L 29/161 (2006.01); H01L 29/872 (2006.01); H01L 29/66 (2006.01); H01L 21/285 (2006.01); H01L 29/45 (2006.01); H01L 21/324 (2006.01); H01L 21/04 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/161 (2013.01); H01L 21/0485 (2013.01); H01L 21/28512 (2013.01); H01L 21/28525 (2013.01); H01L 21/28537 (2013.01); H01L 21/324 (2013.01); H01L 29/16 (2013.01); H01L 29/45 (2013.01); H01L 29/47 (2013.01); H01L 29/66143 (2013.01); H01L 29/872 (2013.01);
Abstract

A method for controlling Schottky barrier height in a semiconductor device includes forming an alloy layer including at least a first element and a second element on a first surface of a semiconductor substrate. The semiconductor substrate is a first element-based semiconductor substrate, and the first element and the second element are Group IV elements. A first thermal anneal of the alloy layer and the first element-based substrate is performed. The first thermal anneal causes the second element in the alloy layer to migrate towards a surface of the alloy layer. A Schottky contact layer is formed on the alloy layer after the first thermal anneal.


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