The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2023

Filed:

Mar. 02, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Hernan A. Castro, Shingle Springs, CA (US);

Innocenzo Tortorelli, Cernusco Sul Naviglio, IT;

Agostino Pirovano, Milan, IT;

Fabio Pellizzer, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 5/063 (2013.01); G11C 13/004 (2013.01); G11C 13/0007 (2013.01); G11C 13/0064 (2013.01); G11C 2013/009 (2013.01); G11C 2013/0073 (2013.01);
Abstract

Techniques are provided for programming a self-selecting memory cell that stores a first logic state. To program the memory cell, a pulse having a first polarity may be applied to the cell, which may result in the memory cell having a reduced threshold voltage. During a duration in which the threshold voltage of the memory cell may be reduced (e.g., during a selection time), a second pulse having a second polarity (e.g., a different polarity) may be applied to the memory cell. Applying the second pulse to the memory cell may result in the memory cell storing a second logic state different than the first logic state.


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