The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2023

Filed:

Oct. 04, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Aleksandar Aleksov, Chandler, AZ (US);

Thomas Sounart, Chandler, AZ (US);

Kristof Darmawikarta, Chandler, AZ (US);

Henning Braunisch, Phoenix, AZ (US);

Prithwish Chatterjee, Tempe, AZ (US);

Andrew J. Brown, Phoenix, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/64 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/642 (2013.01); H01L 21/4846 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/49894 (2013.01); H01L 24/16 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16265 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19103 (2013.01);
Abstract

Embodiments include an electronic package that includes a dielectric layer and a capacitor on the dielectric layer. In an embodiment, the capacitor comprises a first electrode disposed over the dielectric layer and a capacitor dielectric layer over the first electrode. In an embodiment, the capacitor dielectric layer is an amorphous dielectric layer. In an embodiment, the electronic package may also comprise a second electrode over the capacitor dielectric layer.


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