The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2023

Filed:

Jun. 18, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Yang-Che Chen, Hsin-Chu, TW;

Chen-Hua Lin, Yunlin County, TW;

Victor Chiang Liang, Hsinchu, TW;

Huang-Wen Tseng, Hsinchu County, TW;

Chwen-Ming Liu, Hsinchu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 21/486 (2013.01); H01L 21/56 (2013.01); H01L 23/31 (2013.01); H01L 23/5226 (2013.01);
Abstract

A semiconductor package structure and method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a connection layer formed on a metal base layer, at least one die unit formed on the connection layer, a metal pillar connecting the metal base layer and surrounding the die unit, and an interconnect structure overlaid onto the die unit and the metal pillar. Each die unit comprises at least one die attached onto the connection layer and surrounded by a molding structure. The interconnect structure includes a first interconnect layer overlaid onto the die unit and the metal pillar and a second interconnect layer formed on the first interconnect layer. The first and second interconnect layers comprise first and second metal layers being parallel with the top surface of the die unit. A projection of the metal layers overlaps an upper surface of the die.


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