The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2023

Filed:

Dec. 10, 2021
Applicant:

Sj Semiconductor (Jiangyin) Corporation, Jiangyin, CN;

Inventors:

Yayuan Xue, Jiangyin, CN;

Xingtao Xue, Jiangyin, CN;

Chengchung Lin, Jiangyin, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5384 (2013.01); H01L 24/14 (2013.01); H01L 24/94 (2013.01);
Abstract

A chip packaging structure and a method for preparing the same are disclosed. The method includes: providing a wafer having a first surface and a second surface, forming a first redistribution layer on the first surface, wherein the wafer includes TSVs having first ends exposed from the wafer; forming welding pads electrically connected to the TSVs through the first redistribution layer; forming a trimming groove in an edge area of the wafer; bonding the first surface of the wafer to a first supporting substrate, and thinning the second surface of the wafer to expose the second ends of the TSVs; forming, on the second surface of the wafer, solder balls electrically connected to the TSVs through a second redistribution layer; bonding the second surface of the wafer to a second supporting substrate, and peeling off the first supporting substrate; and connecting the welding pads to a semiconductor chip.


Find Patent Forward Citations

Loading…