Systems and methods for semiconductor chip surface topography metrology

Abstract

Embodiments of systems and methods for measuring a surface topography of a semiconductor structure are disclosed. In certain examples, a plurality of interference signals, each corresponding to a respective one of a plurality of positions on a surface of the semiconductor structure, are measured. Calibration signals, associated with a baseline region corresponding to a first category of a plurality of categories and a calibrated region corresponding to a second category of the plurality of categories, are measured. A surface height offset, associated with the baseline region and the calibrated region, is determined based on original surface heights and the calibration signals. The original surface heights are determined based on the plurality of interference signals corresponding to the baseline region and the calibrated region. The surface topography of the semiconductor structure is characterized based, at least in part, on the surface height offset and the original surface heights.