The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2023
Filed:
Jun. 29, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Chia-Ping Chiang, Taipei, TW;
Ming-Hui Chih, Luzhou, TW;
Chih-Wei Hsu, Zhubei, TW;
Ping-Chieh Wu, Zhubei, TW;
Ya-Ting Chang, Caotun Township, TW;
Tsung-Yu Wang, Hsinchu, TW;
Wen-Li Cheng, Taipei, TW;
Hui En Yin, Taipei, TW;
Wen-Chun Huang, Tainan, TW;
Ru-Gun Liu, Zhubei, TW;
Tsai-Sheng Gau, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.